Research Interests:

  • Dynamic reconfigurable architectures and systems.
  • Massively parallel architectures.
  • Cyber-Physical Systems.
  • Distributed Computing.
  • Model Driven Engineering.
  • Performance and energy consumption modeling, estimation, and optimization
  • High level synthesis tools and design space exploration.
  • The Integration of embedded systems within industrial applications.
  • Reconfigurable Computing.
  • Multi Processor System-on-Chip (MPSoC) design.
  • Multi-Objective optimization.

Honors and awards:

– French Research Council (ANR) Doctoral Research Grant from Uni. of Nice Sophia Antipolis, France, 2009.

– IEEE (ICCES 2017) conference best paper award.

Research Projects:

British Research Council Projects:

 PRIME  Project: [link]
PRiME (Power-efficient, Reliable, Many-core Embedded systems), is a five year £5.6m EPSRC funded research programme (2013-2018), which brings together four UK universities with world-leading expertise in low power, highly-parallel, reconfigurable and dependable computing and verified software design. Working in collaboration with five companies and seven international visiting experts, PRiME is addressing the challenge of power consumption and reliability of future high-performance embedded systems utilising many-core processors. PRiME researchers have developed a tool, Prime Framework, for application and platform agnostic runtime management that enables portability of runtime management approaches. We achieve this by considering a system as three distinct layers with abstracted communication between them.
“The PRiME Framework is a step change in cross-layer system optimisation of future many-core and heterogeneous systems. It benefits runtime management researchers and developers by reducing development overhead and enabling the direct comparison of approaches,” said Professor Bashir Al-Hashimi.
The following video will illustrate how contributions from the PRiME project integrate to enable application- and platform-agnostic runtime management that respects application performance targets.

Patners:

 GRACEFUL Project: [link]

Imagine a many-core system with thousands or millions of processing nodes that gets better and better with time at executing an application, “gracefully” providing optimal power usage while maximizing performance levels and tolerating component failures. Applications running on this system would be able to autonomously vary the number of nodes in use. The GRACEFUL project aims at investigating how such mechanisms can represent crucial enabling technologies for many-core systems.
Specifically, the project focuses on how to overcome three critical issues related to the implementation of many-core systems, as identified in the Many-Core Architectures and Concurrency in Distributed and Embedded Systems workshop organized by the EPSRC in April 2012: reliabilityenergy efficiency, and on-line optimisation. The need for reliability is an accepted challenge for many-core systems, considering the large number of components and the increasing likelihood of faults of next-generation technologies, as is the requirement to reduce the heat dissipation related to energy consumption. On-line optimisation, on the other hand, is a mechanism that could be vital to enable the implementation of these properties in systems where several parameters (e.g. number of available cores, power profile, substrate defects and on-line faults) cannot be known at compile time and cannot be managed centrally due to the vast number of cores involved.
The project will combine novel fault tolerance and optimisation methods (which can be optimisation of functional performance but also of power consumption, area, etc.) using a set of background mechanisms that run concurrently with the applications, making use of spare cores (of which in a many-core system there will be significant numbers) to monitor and fix/optimize the operational cores. Thus, an application that runs rarely will be largely ignored but one that runs often will slowly become more and more optimized.

Partners:

European Research Projects:

SPECTRA Project: [link]

Energy efficiency and flexibility in the use of spectrum resources are two major research challenges for the development of future wireless communications technologies. To address these challenges, SPECTRA project will develop a multi-band cognitive radio technology. New techniques for the global efficiency of wireless systems will be developed in the following four directions:

  • the spectral efficiency thanks to the use of cognitive radio techniques in wireless systems,
  • the minimization of electronic component number in wireless systems.
  • the energy optimization for wireless communication terminals by optimizing architecture design and algorithms implementation,
  • the minimization of the generated interference in the environment by selecting the adequate band which will guarantee the shortest transmission distance and the minimum power while preserving the Quality of Service.

French Research Projects:

ORION Project: Ongoing Project.
Partners:

INGEQUIP Project: [link]

From September 2014 to December 2016, the INGEQUIP project was conducted at the IRT Saint Exupéry in Toulouse thanks to the contribution of six industrial companies, five technology providers, and four academic institutions. The common objective was to propose and exploit innovative technologies for the design, the verification, and the validation of aeronautical, automotive, and space equipments. During this period, a team composed of engineers, post-doctoral researchers, and trainees, selected, analysed, experimented, and evaluated various virtual prototyping environments, modelling formalisms, and formal verification methods and tools.
INGEQUIP Project team wrote a book  presenting some of the results of this work. It gives an overview of the methods and tools studied during the project. It shows how they have been applied on small – but representative – examples, and illustrates how they could be implemented on actual industrial projects.
During this period, a team composed of engineers, post-doctoral researchers, and trainees, selected, analysed, experimented, and evaluated various virtual prototyping environments, modelling formalisms, and formal verification methods and tools.
INGEQUIP Project team wrote a book  presenting some of the results of this work. It gives an overview of the methods and tools studied during the project. It shows how they have been applied on small – but representative – examples, and illustrates how they could be implemented on actual industrial projects.
A co-development approach including system, electronic and software engineering has been created as showed in the . The approach ensures the continuity and consistency of all artefacts across the complete chain of engineering activities. It is based on industrial standards such as Capella for system activities, AADL for software refinement and IP-XACT for hardware description. The continuity of the design and verification flow is ensured through model transformations that fill any gaps between the different modelling environments.

Virtual platform technologies like those developed by IRT partners Space Codesign and ASTC Design Partners are compatible with the proposed approach. The scalability of the whole development chain has been demonstrated on the “Twirtee” demonstrator, a smart rover whose HW-SW architecture is representative of avionics-like systems.

Partners:

OPEN-PEOPLE Project [link]:
OPEN-PEOPLE stands for Open Power and Energy Optimization PLatform and Estimator. The platform is defined for estimation and optimization of the power and energy consumption of complex electronic systems. Among the target systems, we mention heterogeneous MPSoC such as the TI OMAP 3530 and reconfigurable circuits like the Xilinx Virtex5 FPGA. Our platform allows power estimation using:

  • Direct access to the hardware execution boards and the measurement equipments. This first alternative enables designer to measure the real power dissipation of the target system. To do so, the low level description of the system (C, VHDL, etc.) is carried out natively on the target board. Furthermore, this alternative is used to build new power models for hardware or software components.
  • a set of Electronic System Level (ESL) tools coupled with accurate power models elaborated within the first alternative. Mainly, we offer tools at the functional and transactional levels in the context of multilevel exploration of new complex architectures.

The figure below presents a global view of the platform which is based on two main parts; the software part and the hardware part. The software user interface ensures the access to the power measurements and helps the designer to define energy models for the hardware and software system components. From the measurements, the designer can build models and compute an estimation of the energy and/or power consumption of its system. In addition, from this software user interface, the hardware platform can be controlled. The hardware part consists of the embedded system boards, the measurement devices, and the computer that controls these different elements and schedules the list of measurements required by different users. Various research and development works are currently done in the OPEN-PEOPLE project. These works include the definition of new methods and tools to model the different components of an heterogeneous system architecture: processors, hardware accelerators, memories, reconfigurable circuits, operating system services, IP blocks, etc. For reconfigurable system, the dynamic reconfiguration paradigm will be modeled to estimate how this feature can be used by Operating System (OS) to reduce the energy consumption. Furthermore, this project studies how the complete estimation and validation can be performed for very complex systems with a small simulation time.

Partners:

FOSFOR Project

The Fosfor (Flexible Operating System FOr Reconfigurable platform) project aims at reconsidering the structure of the RTOS which is generally implemented in software, centralized, and static, by proposing a distributed RTOS with homogeneous interface from the application point of view. We propose to exploit dynamic and partial reconfiguration of the reconfigurable SoC as well as the deployment of the tasks statically or dynamically on software processing units (general processors) or hardware units (reconfigurable areas). Flexibility of the OS will be achieved thanks to virtualization mechanisms of OS services, such that the tasks of the application are executed and communicate without prior knowledge of their assignment to software or hardware. FOSFOR involves Irisa, LEAT Nice, ETIS Cergy, Xilinx and Thales.

Partners: